
Webcast of HP, Samsung, ANSYS, Intel and Inphi presentation at IDF 2011 for HPC applications
Samsung Blogs On New 32 GB LRDIMM Memory Module
Greater Memory Efficiently and Capacity for Today’s Servers
By Jonathan Chizick
Post located on Samsung site: http://www.voicesatsamsungsemiconductor.com/2012/04/greater-memory-efficiency-and-capacity-for-today%E2%80%99s-servers/
Increasingly popular applications today, such as virtualization, continue to drive demand for greater server memory bandwidth. As a strong advocate of Green Memory, I’m constantly looking for ways to use memory to decrease server footprints while maintaining the high performance and efficiency of today’s data centers.
Whether it’s speed or capacity, green memory (like Green DDR3) has been playing a crucial role in meeting the demands of industry servers. Now, consumers and manufacturers may be wondering what to expect next in the way of IT memory efficiency.
That’s why I’m happy to say that we’re now producing a 32 GB LRDIMM memory module which will contribute to IT memory efficiency by increasing the capacity and performance of today’s servers. Designed specifically for high capacity servers and high-performance computing platforms, our LRDIMM (Load Reduced Dual Inline Memory Module) uses the latest JEDEC-standard DDR3 DRAM technology to enable 50 percent more virtual machines compared to standard RDIMMs and increases performance by 10% in Online Transaction Processing (OLTP).

Even more impressive is the LRDIMM’s ability to enable higher memory capacity without sacrificing speed. By enabling higher capacities of DRAM per server DIMM, the LDRIMM provides up to 768GB on a 2-socket server (96GB per channel) with up to 3 DIMMs per channel!
I firmly believe the LRDIMM’s high performance will not only provide substantial power for today’s high-density data centers, but will assist in cutting cooling and space costs as well– a further advancement of Samsung’s Green initiative to achieve higher capacity per server footprint and greater performance per watt.
The LRDIMM offers significant advantages to the end users of high-capacity servers in HPC, financial systems markets and highly virtualized environments. What other ways will data centers benefit from memory advancements such as LRDIMMs?
Process and History of LRDIMM
By Sameer Kuppahalli on 03-16-2012 at 9:00 AM
Few weeks back AMD launched LRDIMM on their Interlagos based systems. This week, Intel launched their Xeon E5 2600, also known and Romley Sandybridge-EP, and LRDIMM as a supported high density memory solution. In the life of a LRDIMM program manager, nothing could be more exciting. Inphi, along with other ecosystem partners, have worked diligently for the last 4 years to bring this technology to the market. I want to write briefly today, not so much about the technology, but more about the process and the history.
Inphi iMB for LRDIMMs and Intel Xeon Processor E5: A Great Match for Delivering True Performance
By by Paul Washkewicz, Vice President of Marketing, Computing and Storage, Inphi on 03-06-2012 at 9:00 AM
When we hear the expression “high-performance,” it’s usually a general descriptor – one that’s open to interpretation. It’s typically applied to describe, say, internal-combustion engines in cars, other mechanical products, or even to consumer goods like vitamins and athletic shoes. But we in the technology realm seem to hear this expression more in the context of high-performance computing, operating systems, storage, applications and the like. And with the new Intel Xeon Processor E5 family announced this week by Intel, the term high-performance has never been more apt, nor has such a CPU platform ever called more for an enabling memory solution such as LRDIMM.
LRDIMM and the Complex Interactions between Low Latency, High Frequency, and Power
By Dr. David Wang on 02-15-2012 at 6:24 AM
In the past few years, I’ve given a few lectures and presentations on the topic of memory systems power and performance characteristics. Occasionally, I get asked the question - “why do DRAM devices consume so much power? Don’t DRAM manufacturers know that low power is very important?” On some occasions, I try to explain that most of “DRAM power” has very little to do with “DRAM”. That is, the power that can really be blamed on the volatile cells inside of DRAM devices is really just the refresh power, and in a high performance memory system inside of a typical workstations or server, refresh power is a relatively minor contributor of the overall power draw. Instead, most of the power consumed by a DRAM device are consumed by circuits such as: high speed input receivers for address and command, active termination for non-target devices on a multi-drop bus, and DLL power for timing control of data output and terminations timing. That is, much of the “DRAM power” that a give DRAM device draws is consumed by circuits on DRAM devices that provide low latency response and precision high frequency timing control. In the case that we replace “DRAM” with another type of memory – let’s call it XRAM - and we place the same low latency and high frequency operation requirements on XRAM, then in all likelihood, XRAM will consume just as much power as DRAM, if not more in the case that the per-bit data movement costs inside of XRAM is more energy intensive than DRAM.
LRDIMM Memory Capacity V.S. System Performance
By Chao Xu on 02-07-2012 at 8:01 AM
Recently I bought two 8GB DDR3 modules and put into my home game server. “Crysis 2” showed much smoother shooting action, fast presentation, and a spectacular visualization. My game score got a record high!
Why does the RAM memory capacity influence the computer performance?
Technically speaking, the RAM memory does not have any kind of influence on the processor performance of the computer, that is, the RAM memory does not increase the processing performance of the processor.
So, what is the relationship between the RAM memory and the performance?
The computer processor search for instructions are stored in the RAM memory of the computer to be executed. If those instructions are not stored in the RAM memory, they will have to be transferred from the hard disk (or from any other storage system, such as flash, CD-ROMs) to the RAM memory - the well-known process of "loading" a program.
AMD Validates iMB™ for Opteron™ 6200 Series Platform
By Paul Washkewicz, Vice President of Marketing, Computing and Storage at Inphi on 01-30-2012 at 8:01 AM
We continue to see and increased demand for memory-management solutions and have worked closely with major OEMs to increase memory capacity, performance and speed. Today, we announced that LRDIMMs enabled by Inphi’s iMB™, have been fully validated and supported on the new AMD Opteron™ 6200 Series processors, formerly code-named "Interlagos." The validation provides memory vendors and systems designers the assurance that they can populate AMD Opteron 6200 Series-based systems with up to 768GB of cost-effective memory for today’s demanding enterprise and cloud-based applications in 2P servers. Check out the full press release.
LRDIMM Ecosystem Taking Off
By Doug Daniels on 01-23-2012 at 8:52 AM
In case you missed it over the holidays, several major industry players have announced LRDIMM-related news in the past few months.
In November and December, Intel posted successful validation results to their website for eight different LRDIMMs from five different suppliers, all using Inphi’s iMBTM. The LRDIMM modules ranged from 8GB to 32GB in capacity, and were validated at rates including DDR3-1066, DDR3L-1066 and DDR3-1333. Suppliers passing Intel’s rigorous testing included Samsung, Hynix, Crucial, Elpida and Micron.
Also in November, Micron announced a full lineup of LRDIMM offerings, including 8GB, 16GB, 32GB and 64GB varieties. SMART Modular Technologies announced a 16GB LRDIMM of their own earlier this month.
Looking for someplace to plug in your new LRDIMMs? Server maker Supermicro lists seven motherboards boasting LRDIMM BIOS support. Keep watching the LRDIMM Files blog and Inphi’s press releases for new LRDIMM announcements.
Server Design Summit LRDIMM Presentation
Posted on 12-19-2011 at 2:25 PM
Inphi's Sameer Kuppahalli recently presented on "Introducing LRDIMM in Servers and Workstations" at the 2011 Server Design Summit. The conference was held in Santa Clara, CA Nov 29-30, 2011. You can check out his presentation by visiting: http://www.serverbladesummit.com/English/Collaterals/Proceedings/2011/20111129_S2-101_Kuppahalli.pdf
Live LRDIMM Demo at SC11
By Doug Daniels on 11-08-2011 at 9:12 AM
Developers, users and fans of High-Performance Computing systems won’t want to miss Inphi’s live LRDIMM demo at SC11 in Seattle next week, November 14th to 17th. The demo will showcase the system speed and DDR3 memory capacity made possible by the LRDIMM in HPC applications. Stop by Booth # 5300 in the Washington State Convention and Trade Center to say hello and ask any questions you have about the LRDIMM or Inphi’s iMBTM.
SC11 is the international conference for high performance computing, networking, storage and analysis. After you visit the Inphi booth, keep a sharp eye out for LRDIMM sightings elsewhere on the convention floor. See you in Seattle!
Come listen to Inphi Speaker's presentations at JEDEC's Server Memory Forum on Nov 1~2!
JEDEC's Server Memory Forum will be held November 1-2, 2011 at the Hilton in Santa Clara, California.
Mr. Paul Washkewicz's presentation will be held on November 1 at 3:30 p.m. Pacific Time. He will be presenting:
- DDR3 Memory Buffer: Buffer at the Heart of the LRDIMM Architecture
Dr. David Wang's presentation will be held on November 2 at 1:00 p.m. Pacific Time. He will be presenting:
- A Perspective on DRAM Memory Systems: Metrics and Scaling Trends
More information and registration information may be found at the following location: http://www.jedec.org/events-meetings/server-memory-forum
See you there!
Inphi’s iMBplus – Industry’s First LRDIMM Signal Integrity Tool to Analyze and Improve System Memory Performance
By Abhishek Desai on 10-13-2011 at 7:13 PM
What are the challenges with LRDIMM debugging today? In a LRDIMM, the loading on the host controller is greatly reduced by Inphi’s Isolation Memory Buffer (iMB™) that facilitates larger memory capacities at higher frequencies. On a system platform, when LRDIMM is plugged into the memory slot, the host controller instructs the iMB to train with the DRAM behind the buffer and subsequently the host controller trains with the iMB. This procedure is completed by the BIOS at which point the memory system is ready for regular operation. Given the lack of visibility for the host controller to the ranks of DRAM hidden behind the memory buffer, any issues with initializing or training the memory system is very hard to debug.
Examples include:
- Probing difficulties on the DIMM due to inaccessible probe points.
- The number of signals that need probing to comprehend the overall functionality is large and complex.
- SI issues that occur randomly due to a bad eye margin are difficult to capture reliably.
-
Memory and Buffer Vendors do not have the capability to poll the host controller for status/debug messages.
How does iMBplus resolve these challenges?
The system debug can be greatly improved if training and initialization issues are isolated as pre-buffer related or post-buffer. This is when iMBplus becomes a critical tool in the debugging process. Inphi’s iMBplus is a unique debug analysis tool that offers the following features and benefits:
- Margining capability of the post buffer interface to allow customers to analyze the signal integrity of the DRAM interface as comprehensively as a pre-buffer interface, improving the quality of the LRDIMM.
- User-friendly programmability of the iMB control words and logging capability of the post-buffer control status registers to simplify the analysis of any failures on the post-buffer DRAM interface.
- Eliminates the need for DIMM vendors to perform repeated testing across various memory controllers which improves the overall efficiency of the testing process and lowers the test cost.
Taking a Closer Look
iMBplus has two main components. One part consists of the core software that is loaded on an EPROM chip in the same socket as the regular BIOS. The second part is the client software that runs on a PC with Windows XP or Widows 7. The two parts talk to each other through a RS232 serial interface cable. The core software in turn communicates with the iMB on every DIMM of the memory socket and passes on the commands it receives from the client software.
Once the iMBplus is installed on the system one can probe all internal registers in the iMB for debug information. One can also run MEMBIST that is built into the iMB to check DRAM robustness. One example where system level debug is needed is when the host controller fails a boot test due to host memory test failures. By running iMBplus and iMB MEMBIST, one can isolate the issue to be a post-buffer (iMB-DRAM) related problem or a pre-buffer (host-iMB) related problem. This helps to focus resources and get to the root cause faster. iMBplus is also used to check eye margins on the post buffer side. One can validate a DIMM to be healthy if enough margins are found on either side of trained values. Voltage margins are also available on the DRAM side. iMBplus can be used not only for debug but for obtaining general info on the system setup like reading the SPD bytes on the DIMM or reading the settings of MRS commands from the iMB.
Let me know your thoughts or send me any questions that you have!
Show older entries 



























