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Inphi’s iMBplus – Industry’s First LRDIMM Signal Integrity Tool to Analyze and Improve System Memory Performance

By Abhishek Desai on 10-13-2011 at 7:13 PM

What are the challenges with LRDIMM debugging today? In a LRDIMM, the loading on the host controller is greatly reduced by Inphi’s Isolation Memory Buffer (iMB™) that facilitates larger memory capacities at higher frequencies. On a system platform, when LRDIMM is plugged into the memory slot, the host controller instructs the iMB to train with the DRAM behind the buffer and subsequently the host controller trains with the iMB. This procedure is completed by the BIOS at which point the memory system is ready for regular operation. Given the lack of visibility for the host controller to the ranks of DRAM hidden behind the memory buffer, any issues with initializing or training the memory system is very hard to debug.
Examples include:

• Probing difficulties on the DIMM due to inaccessible probe points.
• The number of signals that need probing to comprehend the overall functionality is large and complex.
• SI issues that occur randomly due to a bad eye margin are difficult to capture reliably.
• Memory and Buffer Vendors do not have the capability to poll the host controller for status/debug messages.
   

How does iMBplus resolve these challenges?
The system debug can be greatly improved if training and initialization issues are isolated as pre-buffer related or post-buffer. This is when iMBplus becomes a critical tool in the debugging process. Inphi’s iMBplus is a unique debug analysis tool that offers the following features and benefits:

• Margining capability of the post buffer interface to allow customers to analyze the signal integrity of the DRAM interface as comprehensively as a pre-buffer interface, improving the quality of the LRDIMM.
• User-friendly programmability of the iMB control words and logging capability of the post-buffer control status registers to simplify the analysis of any failures on the post-buffer DRAM interface.
• Eliminates the need for DIMM vendors to perform repeated testing across various memory controllers which improves the overall efficiency of the testing process and lowers the test cost. 

Taking a Closer Look
iMBplus has two main components. One part consists of the core software that is loaded on an EPROM chip in the same socket as the regular BIOS. The second part is the client software that runs on a PC with Windows XP or Widows 7. The two parts talk to each other through a RS232 serial interface cable. The core software in turn communicates with the iMB on every DIMM of the memory socket and passes on the commands it receives from the client software.

Once the iMBplus is installed on the system one can probe all internal registers in the iMB for debug information. One can also run MEMBIST that is built into the iMB to check DRAM robustness. One example where system level debug is needed is when the host controller fails a boot test due to host memory test failures. By running iMBplus and iMB MEMBIST, one can isolate the issue to be a post-buffer (iMB-DRAM) related problem or a pre-buffer (host-iMB) related problem. This helps to focus resources and get to the root cause faster. iMBplus is also used to check eye margins on the post buffer side. One can validate a DIMM to be healthy if enough margins are found on either side of trained values. Voltage margins are also available on the DRAM side. iMBplus can be used not only for debug but for obtaining general info on the system setup like reading the SPD bytes on the DIMM or reading the settings of MRS commands from the iMB.

Let me know your thoughts or send me any questions that you have!

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