The LRDIMM Files brings you...

LRDIMM Info Revealed
Load reduced DIMMs (LRDIMMs) are a new class of memory modules. Designed with a memory buffer chip to replace the register to help minimize loading, LRDIMMs increase server memory capacity by 3x at higher speeds for HPC, virtualization and in-memory database applications.

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“Evolution is a mystery/Full of change that no one sees.”
from “Evolution” by Motorhead

Introducing the LRDIMM

By Doug Daniels on 07-08-2011 at 3:43 PM

Welcome to Inphi’s new LRDIMM blog! The purpose of this blog is to introduce you to the LRDIMM, a new type of memory module for high capacity servers and high performance computing platforms. LRDIMM is an abbreviation for Load Reduced Dual Inline Memory Module, the newest type of DIMM supporting DDR3 SDRAM main memory. The LRDIMM is pin-compatible with existing JEDEC-standard DDR3 DIMM sockets, and supports higher system memory capacities when enabled in the system BIOS. Existing RDIMM (registered DIMM) memory technology forces end-users to make tradeoffs between memory capacity and operating speed, and is beginning to fall short of ever-increasing user demands for higher capacity. The LRDIMM overcomes these obstacles, enabling higher capacity systems running at the highest operating speeds.

At the heart of the LRDIMM technology is the memory buffer. Figure 1 below shows a high-level conceptual drawing of an LRDIMM, featuring one memory buffer (such as Inphi’s iMB^TM) on the top side of the module and multiple ranks of DRAM mounted on both front and back sides. The memory buffer re-drives all of the data, command, address and clock signals from the host memory controller and provides them to the multiple ranks of DRAM. This isolates the DRAM from the host, reducing the electrical load on any data bit. Reducing the electrical loading in this manner allows a system to operate at a higher speed for a given memory capacity, or to support a higher memory capacity at a given speed. On existing RDIMM technology, the data bus connects directly to the multiple ranks of DRAM, increasing electrical load and limiting system speed as the desired server capacity increases. Figure 2 shows the system-level block diagram for RDIMM and LRDIMM.