Impact of High-Performance Analog Solutions on Cloud Computing

June 8, 2009

 

Cloud computing is emerging as a powerful force that is reshaping the information technology (IT) industry. In this new model, computing power resides in large data centers, and users around the globe drive the ever-increasing demand for computing capacity and network bandwidth. While processor performance and power continue to benefit from innovations in digital technology via Moore's Law, innovations in high-performance broadband analog technology are required to transport data between processor and memory, and across the network. These broadband analog solutions are accelerating server virtualization and at the same time improving energy efficiency by doubling memory capacity and throughput and by increasing network bandwidth from 1Tb/s per fiber to 1Tb/s per fiber. This article will discuss key trends and technologies for high-performance broadband analog solutions that enable cloud computing.

Introduction

Over the past several years, IT users have witnessed the following shifts in IT infrastructure:

• Voice- and data-centric traffic for users in developed countries to multimedia traffic for users worldwide.
• Limited bandwidth connectivity to ubiquitous broadband connectivity.
• Plentiful fossil fuel-based energy sources to a universal focus on efficient energy consumption from clean, renewable energy sources.
• On-site computing resources that are personal computer (PC)-based to computing resources "in the cloud."

These shifts, driven by an explosion of high-bandwidth content, are putting severe pressure on computing and network resources. As a result, cloud computing is emerging as a powerful force that is reshaping the IT industry. In this new cloud computing model, computing power resides in large data centers while users around the globe drive the ever-increasing demand for network bandwidth and computing capacity.

Cloud computing offers a compelling value proposition for both users and providers. For users, cloud computing provides a cost-effective way to increase capacity, with computing power accessible anywhere from thin clients. No capital equipment purchases, additional staff, training or maintenance are necessary. Users are able to leave security and reliability issues to service providers and only pay for what they consume. For providers, cloud computing offers a cost-effective way to scale capacity, manage infrastructure and offer services with tremendous economies of scale.

Developments in next-generation hardware technologies play an important role in the evolution of cloud computing. Innovations in digital technologies continue to drive multi-core processor architectures and processor performance and power via Moore's Law (technology node reductions from 65-nanometer to 45-nanometer, 32-nanometer, etc.). However, innovations in analog design are required to address bottlenecks in transporting data to/from the system memory and the network, and to enable the scalable, efficient infrastructure necessary to support cloud computing. Some of the key infrastructure trends enabled by high-performance broadband analog technologies are:

• Increased server memory capacity to support greater levels of virtualization.
• Increased memory throughput to support higher server performance.
• Increased network backbone bandwidth to support ever-increasing traffic.
• Improved energy efficiency to reduce power and cooling costs.

Resolving the Processor-Memory Bottleneck

To reap the benefits of increased processor performance, the system memory must supply sufficient data to the processor (memory capacity), and that data must be available at the rate the processor requires (memory throughput). When these conditions are not met, the result is a processor-memory bottleneck (Figure 1).

In cloud computing data centers, virtualization requirements are exacerbating the processor-memory bottleneck. Virtualization is a fundamental technology that enables cloud computing, as it maximizes compute resource utilization by sharing resources across diverse software applications. Therefore, multiple software applications, each with its own memory requirements, must share the same processor. As a result, virtualization and multi-core processor architectures are driving the need for higher memory capacity and throughput.

Figure 1. Processor-Memory Bottleneck

However, current technologies have signal integrity limitations that force a trade-off between memory capacity and memory throughput. Non-idealities in the memory input/output (I/O) subsystem, such as impedance mismatches, loading effects of memory devices, limitations in memory I/O sensitivity and drive capability, and process/voltage/temperature variations, restrict the maximum number of memory devices connected to a single central processing unit (CPU) channel. The impact of these non-idealities worsens as data rates increase. Therefore, as throughput increases, the maximum memory capacity decreases.

To resolve this issue, data centers are leveraging the third-generation double data rate synchronous dynamic random access memory (DDR3 SDRAM) standard from JEDEC, which is designed to meet the needs of virtualization and dual/multi-core processor systems.1 DDR3 differs from the prior memory standard DDR2 in several areas, including memory capacity, data rate and operating voltage.

For typical server systems, DDR3 enables three or more dual inline memory modules (DIMMs) per channel and three channels per CPU, versus two DIMMs per channel and two channels per CPU for DDR2. Therefore, DDR3 typically offers more than double the memory capacity of DDR2. In addition, DDR3 supports data rates up to 1600Mbps per pin, which is double the 800Mbps per pin data rate of DDR2. DDR3 also specifies an operating voltage as low as 1.35V, a 25 percent reduction from DDR2, which operates at 1.8V.

These DDR3 specifications for memory capacity, data rate and operating voltage create the following challenges in broadband analog design:

• The great number of DIMMs per channel requires a given CPU channel to drive the large number of memory devices.
• Data rate doubling requires higher signal frequencies.
• Operating voltage reduction requires reduced voltage swings and signal integrity margins.

Addressing these challenges requires broadband analog innovations such as:

• Better impedance calibration and matching.
• Programmable drive strength and impedance in memory I/O drivers.
• Improved memory module transmission line topology.

Resolving the Network Bottleneck

Global Internet protocol (IP) traffic is forecasted to be six times larger in 2012 than in 2007.2 This growth will be driven by the continuing explosion in video traffic (e.g., mobile video, IPTV and high-definition video conferencing) and enabled by the growth in broadband penetration. To accommodate this, service providers are accelerating the upgrade of core and metro networks to 40G network links, with 100G network links soon to follow. A single strand of optical fiber, which can transport 1Tbps today, will soon be able to transport 10Tbps.

This data rate increase is occurring throughout the network. On the end-user side, passive optical network (PON) technologies, wireless technologies such as wireless local area networks (WLANs) and Worldwide Interoperability for Microwave Access (WiMAX), and cellular technologies such as Long-Term Evolution (LTE) will continue to drive broadband penetration by enabling richer, higher bandwidth applications. In the data center, 10G Ethernet is in volume deployment, and 40G Ethernet and 100G Ethernet are expected to reach standardization by 2010. Over the wide area network (WAN), the Optical Transport Network (OTN) infrastructure is being upgraded from 10G to 40G and then to 100G (Figure 2).

Figure 2. Evolution of Network Bandwidths

A 10x leap in data rate such as this puts severe demands on the underlying technologies in transceiver modules that transport data over optical fibers spanning up to thousands of kilometers. Some of the key innovations in broadband analog technology that make this possible include high-voltage broadband drivers in surface mount packages on the transmitter side and broadband amplifiers with highly linear performance on the receiver side.

For transmitters in long-haul optical communications systems, high-speed modulator drivers are used to drive optical modulators (Figure 3). These modulator drivers need to provide voltage swing levels of 8V to 9V at ultra-high data rates of 22Gbps or above. Meeting these specifications, while providing the high reliability required by telecom networks, requires state-of-the-art broadband analog designs that push the envelope in process and circuit technologies. Successful designs must balance the trade-offs between output voltage swing, rise time, gain, reliability and power consumption.

Figure 3. Modulator Drivers in 40G DQPSK Transmitter

Furthermore, form factor is also a critical specification for modulator drivers. The first generation of 40G differential quadrature phase shift keying (DQPSK) transceiver components were housed in metal microwave packages with GPPO connectors. These components were interconnected via coaxial cables, which resulted in transceiver modules that were bulky, labor-intensive and costly to manufacture. As 40G deployment volume grew, it became increasingly important to drive down size and cost. Through innovations in packaging design in the areas of signal integrity and thermal management, next-generation 40G transceiver components will be in surface mount packages, which are lower in cost and well suited to high-volume manufacturing.

On the receiver side, the main challenge is to accurately recover attenuated, distorted signals after they have been transported through thousands of kilometers of optical fiber. In addition, service providers ever vigilant in their quest to minimize capital expenditures are demanding that their equipment vendors deliver next-generation network performance while utilizing the existing installed optical fiber network. This has led to the development of sophisticated modulation formats that require highly linear analog front-ends.

Optical communication systems have traditionally used on/off keying as a modulation format such as nonreturn-to-zero (NRZ). However, existing installed optical fibers are not designed to support speeds beyond 10Gbps using NRZ modulation since 40Gbps or 100Gbps NRZ signals would occupy too broad a spectrum in the optical fiber. In addition, at higher speeds, such as 40G or 100G, fiber impairments, such as polarization mode dispersion, limit the distance over which such signals can be transmitted.3 Therefore, carriers are adopting advanced modulation schemes with multi-level formats, such as dual polarization-quadrature phase shift keying (DP-QPSK), which enable higher speed transmission over longer distances on currently installed optical fiber. Such modulation formats require highly linear analog front-ends, and a key component is a highly linear transimpedance amplifier (TIA) to faithfully amplify signals received by the photodiode.

Improving Energy Efficiency

A large data center with 40,000 to 80,000 servers draws 5MW to 13MW for the memory subsystem alone.4 This is approximately 15 percent to 25 percent of the server system's total power consumption. High-performance broadband analog technologies can help improve a memory subsystem's energy efficiency. As previously described, DDR3-based memory subsystems consume less power than DDR2 due to lower operating voltages and other power-saving techniques specified by the DDR3 standard.

High-performance broadband analog solutions will enable data centers to deliver more computational capacity with lower power. Through the use of the power-saving techniques previously discussed, broadband analog I/O technologies can yield over $400,000 in annual energy savings for a large data center via reductions in power and cooling costs.

Conclusion

As enterprises and consumers increasingly adopt services delivered by the cloud computing model, data center computing capacity and network bandwidth will need to keep pace. High-performance broadband analog solutions are delivering key performance and power improvements in the cloud computing infrastructure such as a 2x increase in memory capacity and throughput to meet virtualization demands, a 10x increase in network speed and lower power consumption for memory subsystems.

About the Author

Dr. Francis Ho is the senior director of business development at Inphi Corporation in Westlake Village, California. Prior to Inphi, he worked at McKinsey & Company, JP Morgan Partners, ONI Systems, Siliquent Technologies and Schlumberger. Dr. Ho holds a doctoral degree in physics from Stanford University, and a master's degree in applied physics and a bachelor's degree in physics from Caltech.

Resources

1 http://www.inphi-corp.com/technology-overview/Going%20Green%20with%20DDR3%20memory.pdf.
2 http://www.cisco.com/en/US/solutions/collateral/ns341/ns525/ns537/ns705/ns827/white_paper_c11-
481374_ns827_Networking_Solutions_White_Paper.html.
3 http://www.inphi-corp.com/technology-overview/40G%20DQPSK%20Optical%20Transmission%20Technology.pdf.
4 http://www.inphi-corp.com/technology-overview/Going%20Green%20with%20DDR3%20memory.pdf.

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