13651DE
13 Gbps Differential Encoder in QFN package (+3.3 V Supply)

Applications

• High-speed (up to 13 GHz) optical duobinary systems
• High-speed (up to 13 Gbps) optical differential phase shift keying systems (DPSK)
• High-speed (up to 13 Gbps) digital logic
• Broadband test and measurement equipment

Features

Supports data rates up to 13 Gbps Fast rise and fall times: 15 ps typical  Low power consumption: 380 mW typical 290-degree input phase margin (at 12.5 Gbps) Supports single-ended and differential operation Output signal swing: 1200 mVpp differential Single +3.3 V power supply Available in QFN package Evaluation board available

Description

The 13651DE differential encoder performs modulo two addition of the input data bit with the previous output bit.  The part operates up to 13 Gbps and retimes the input data before performing the encoding operation, thereby providing a large input phase margin. 

The encoder is nominally positive-edge triggered, however, by reversing the positive and negative clock connections, a negative-edge triggered application can be accommodated.

All differential data and differential clock inputs are on-chip DC coupled and terminated with 50 Ω resistors to V_CC.  For direct-coupled applications, the differential data outputs should be terminated off-chip with 50 Ω resistors to V_CC (+3.3 V).  For applications requiring termination to DC levels other than V_CC (i.e. ground referenced systems), external AC coupling to a good RF ground is required.  See the application note for various termination examples.

The 13651DE operates from a single +3.3 V power supply and dissipates only 380 mW.  It is available in a 3 x 3 mm² quad flat no-lead (QFN) package and is also available on an evaluation board with SMA connectors.

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