As seen from Inphi’s previous blog posts, the exponential increase in bandwidth demand is driving continuous innovations in the deployment of data movement interconnects for cloud and telecom providers. Due to its scalability, reliability and maturity, PAM4 (4-Level Pulse Amplitude Modulation) based signaling has emerged as the mainstream technology for high-speed interconnection of next-generation data center and 5G infrastructure.
As the baud rate increases beyond 28GB/lane, the electrical signal on the backplane will suffer from severe loss and intersymbol interference (ISI) due to board material limitation. Higher-order modulation can transmit more data with reduced baud rate. Therefore, the industry is increasingly calling for higher-order modulation such as PAM4 to solve this problem. The PAM4 signal uses four different signal levels for signal transmission, and each symbol period can represent two bits of logical information (0, 1, 2, 3), that is, four levels per unit time. Since the PAM4 signal can transmit two bits of information per symbol period to achieve the same signal transmission capability (or bit rate), the symbol rate of the PAM4 signal only needs to reach half of the NRZ signal. Therefore, the loss and impairment caused by the transmission channel is greatly reduced.
If the optical signal can also be transmitted using PAM4, the clock recovery and pre-emphasized PAM4 signal can be directly realized due to the electro-optical transmitting performance inside the optical module. Therefore, the unnecessary step of converting the PAM4 signal into the NRZ signal of two times the baud rate and then performing related processing is eliminated. This greatly reduces the chip design complexity, cost and power consumption.
PAM4 based connectivity has become the mainstream solution for data center and 5G infrastructure. Driving this connectivity is the fact that a hyperscale data center’s ongoing upgrade cycle requires high bandwidth and port density. PAM4 modulation has become the industry standard and is widely used for electrical and optical signal transmission on 50G, 200G, 400G and upcoming 800G interfaces. PAM4 has also emerged as a favorable solution for 5G infrastructure deployments, where high-bandwidth connectivity that is reliable, economical and scalable are critical.
Inphi has been the industry leader to enable PAM4 in both data centers and 5G infrastructure segment. Key highlights:
- Inphi introduced the industry’s first 800Gbps PAM4 solution, Spica, for mega data centers and artificial intelligence (AI) networks
- Inphi’s 50Gbps PAM4 products, Polaris™ and Vega™, and its 100Gbps PAM4 products, Porrima™ and Spica™, serve as the leading performance benchmark in the industry
- Inphi-enabled PAM4 solutions paved the way for hyperscale data centers to deploy 200G and 400G in large scale
- Inphi delivers high bandwidth solutions for 5G deployment in mid-haul, back-haul and front haul
Why Move to PAM4?
As I discussed earlier, PAM4 technology uses four different signal levels for signal transmission. It can transmit two bits of logic information per clock cycle and double the transmission bandwidth, thus effectively reducing transmission costs. For example, 50GE is based on a single 25GBaud optical device and the bandwidth is doubled through the electrical layer PAM4 technology. This effectively solves the problem of high cost, while satisfying the bandwidth improvement. The 200GE/400GE adopts 4/8 channel 25GBaud devices and the bandwidth can be doubled by PAM4 technology.
For inside data center and 5G infrastructure applications, achieving high bandwidth with fewer optics can significantly reduce costs. The initial goal of adopting higher order modulation formats is to place more complexity on the circuit side, which is easier to scale. This in turn reduce the dependency on exotic optical components, which are more difficult to scale, such as lasers and modulators. The use of high-order modulation formats has been proved to be an effective way to reduce the number of optics used, leverage matured and commercially available optics and achieve a balance between performance, cost, power and density in different applications.
The Industry Wide Transition to PAM4 is Enormous!
The transition from NRZ to PAM4 is industry wide and the scale is massive. Besides in the data center, we see this with AI and even in memory and storage, such as NVIDIA’s RTX 30 series video card which uses PAM4-based memory.
The wide range of applications for PAM4 requires the underlying technology to be robust, adaptive and reliable. Why? Because PAM4 connects network fabrics (networking ASICs) and machines (servers, AI machines). Different fabrics and machines use different interface SerDes, different settings and different chips. In real world operation, the environment changes dynamically, which underscores the need for the technology to be adaptive. For operators, they need not only a set-and-go solution but also need it to be plug-and-play.
The above practical requirements from end customers put many challenges to components vendors to deliver high volume products to build a system utilizing PAM4 modulation. PAM4 is a modulation scheme defined how to manipulate the bit steam. Components vendors need to implement advanced electronics and circuitry to encode/decode, re-amplify, re-shape, and re-time the signal.
Various integrated circuit implementation approaches have been explored by the academia and industry. These implementation techniques can be put in two main categories – analog and digital implementations. What is an analog or digital implementation? What are the differences for PAM4 applications? Which one is more scalable and more adaptive for such a wide range of application scenarios? At Inphi we have studied and experimented with both approaches in details and would like to walk through the experience with the readers in the following section.
Implementation Approaches for PAM4 Electronics
Analog-based PAM4 implementation leverages the legacy NRZ receivers’ design that has been used for decades. The most recent commercial success with an analog receiver is the wide deployment of 40G/100G optical transceiver modules and networking equipment with 10G/25Gbps NRZ signaling. However, PAM4 analog-based receivers reply on detecting the transition of voltage levels, rather than direct detect the four voltage levels, which proved to be power hungry and more expensive. Analog-based implementation can be built with SiGe BiCMOS or standard silicon CMOS process and although quite simple, is prone to process, voltage and temperature variations. Therefore, each block needs to be fine-tuned.
A digital-based implementation for PAM4 utilizes Analog-to-Digital Converters (ADC) to sample the received signal, convert the analog signal to digital and compute mathematics in the Digital Signal Processors (DSPs). The DSP block cleans up the signal in the digital domain before converting it back to analog to transmit. Since the signal is converted with high-resolution ADCs and then processed in the digital domain, it gives the designers a lot of variables and math to play with. As a result, the digital-based PAM4 DSP architecture is versatile and software configurable to cover various deployment scenarios and is fully adaptive in real-time. Over the last few years, designers have optimized the power consumption of the DSP and have made it very economical to implement.
Today, 50G, 200G and 400G transceivers deployed in the field, almost all use digital-based PAM4 for its reliable performance and capabilities to fully adapt to the changing environment. As a matter of fact, only digital-based PAM4 electronics can meet the requirement defined by major industry standard bodies such as IEEE. Module vendors and system operators can monitor the performance in real-time and tune the link for different use cases through the means of software. This eliminates the need to redesign or retrain the hardware and optics when deployed in a different system, saving on operating expenses. Digital-based PAM4 is built with the same advanced CMOS technology widely used for consumer electronics, which is cost-effective and intended for large scale commercial operations. Multiple generations of digital-based PAM4 chip has been developed and deployed, with dramatic reduction in power and saving in cost. Digital-based PAM4 can leverage a wide range of lasers with different qualities to shorten the time-to-market and reduce overall cost of ownership.
The Future is Digital-based PAM4 DSP
In short, by using a digital-based PAM4 DSP you achieve more robustness and versatility. It covers a wide range of applications with minimum tuning, mostly software no hardware tuning needed, and its cost structure is based on commercial technology optimized for consumer electronics scale (i.e., CMOS on CPU, GPU, cellphone). Whereas an analog implementation can work in “pockets” of applications and is mainly used for specialized cases that involves carefully tuned software and hardware.
Hyperscale data centers are in the midst of an ongoing upgrade cycle that requires that high bandwidth optics and high front panel port density. 5G infrastructure deployments need reliable and economical solutions for higher bandwidth. Therefore, digital-based PAM4 connectivity is becoming the mainstream technology for data center and 5G infrastructure.
Inphi is once again breaking a technology barrier to lead the industry, building on its strong track record of successfully executing consecutive leaps over technical hurdles because of its unique approach and commitment to innovation.
Moving forward, Inphi is focused on digital-based PAM4 DSP architecture because it’s versatile, software configurable to cover various deployment scenarios and fully adaptive in real-time. The future is digital-based PAM4 DSP.
This is the age of constant connectivity, fast speeds and The Rise of Internet 3.0. From the cloud, to inside and between data centers, to telecom and 5G access and to every device in between, Inphi PAM4 DSP solutions are designed to be robust, adaptive and reliable —redefining what it means to moves big data faster.