Inphi Announces Next Generation 100 Gigabit Ethernet CMOS SerDes Architecture

LOS ANGELES, March 8, 2011 – Inphi Corporation (NYSE: IPHI), a leading provider of high-speed analog semiconductor solutions for the communications and computing markets, today announced a new 100 GbE CMOS SerDes architecture, called iPHY, designed to enable the development of next generation low power and high port density 100 Gigabit Ethernet (100 GbE) solutions to address bandwidth bottlenecks in next generation data center and communications infrastructures.

“Inphi continues to innovate. Our iPHY CMOS architecture is specifically designed to enable the development of next generation low power and small form factor 100 GbE transceivers,” said Young Sohn, President and CEO, Inphi. “Together, working closely with leading OEMs and ecosystem partners, we can deliver more than 2X reduction in power and size, and 10X increase in port density for 100 GbE transceivers versus existing solutions based upon silicon-germanium technology. We believe this helps accelerate the mass transition from 10 GbE to 100 GbE in data center and communications infrastructures.”

Cost-effective, energy-efficient 100 GbE links are expected to become important tools for data center and service provider networks, which are seeking to address the demand for increased/greater bandwidth. The evolution of the 100 GbE transceivers necessary to support this growth is expected to follow a path similar to that of the earlier Gigabit Ethernet and 10 GbE technologies, which evolved from power-hungry, large form factor, and niche transceivers to low power, small form factor, and high volume products. There are two critical steps on this path:

    • First, migrate the 100 GbE transceiver’s high-speed SerDes from its present implementation in exotic silicon-germanium (SiGe) technology to low power CMOS designs that can be economically fabricated using mainstream commercial CMOS processes.
  • • Second, introduce innovative architectures that significantly reduce the power consumption and size of the transceivers.

The Inphi iPHY architecture is designed to address these steps and offer comprehensive solutions for physical layer integrated circuits (ICs) inside the transceiver module and on the line card to enable next generation 100 GbE systems to achieve more than 2X reduction in transceiver power consumption and 10X increase in port density.

Inphi embarked on its iPHY architecture in 2009, and is working closely with leading networking OEMs and ecosystem partners to develop the 100 GbE CMOS SerDes technology. In addition, Inphi has been actively driving the development of next generation low power and high port density 100 GbE standards at the IEEE and the Optical Internetworking Forum (OIF) meetings.

“The demand for network bandwidth is experiencing high growth, partially driven by the increase of mobile devices and wireless connectivity and users seeking faster access to high-performance applications, such as high-definition video and multimedia content,” said Daryl Inniss, Ovum’s Component VP and Practice Leader. “Ovum estimates demand for 100 GbE transceivers to grow at a high compounded annual growth rate of over 100% from 2010 to 2013, well above the industry average of 14%, because these transceivers are an emerging cost-effective solution supporting the bandwidth growth.”

The iPHY architecture is Inphi’s latest step in expanding its 100G offerings to address the bandwidth bottlenecks in data centers and communications infrastructures. Inphi anticipates sampling its first 100 GbE CMOS SerDes products in the second half of 2011.

OFC/NFOEC 2011
At the Optical Fiber Communication Conference and Exposition and the National Fiber Optic Engineers Conference (OFC/NFOEC) 2011 in Los Angeles, March 8-10 in Booth #1447, Inphi will highlight its broad portfolio of high-speed analog semiconductors for next generation networks.

Today, the Company also announced that its 2850TA dual-channel transimpedance amplifier (TIA) enables the deployment of industry standard single wavelength 100G coherent transport systems (see today’s related announcement titled: “Inphi’s Next Generation Coherent Technology Enables Industry’s First 100G Field Deployment”).

About Inphi
Inphi Corporation is a leading provider of high-speed analog semiconductor solutions for the communications and computing markets, providing high signal integrity at leading-edge data speeds that are designed to address bandwidth bottlenecks in networks, minimize latency in computing environments and enable the rollout of next generation communications infrastructure. Inphi’s solutions provide a vital interface between analog signals and digital information in high-performance systems, such as telecommunications transport systems, enterprise networking equipment, enterprise and data center servers, storage platforms, test and measurement equipment and military systems. To learn more about Inphi, visit www.inphi.com.


Cautionary Note Concerning Forward-Looking Statements
Statements in the press release that are not historical facts, are “forward-looking statements” within the meaning the Private Securities Litigation Reform Act. These forward-looking statements may be identified by terms such as can, designed to, believe, expect, continue, may, will, provide and the negative of these terms or other similar expressions. These statements include statements relating to the anticipated features and benefits of iPHY, our 100 GbE CMOS SerDes architecture, the ability of this architecture to enable the development of next generation low power, high port density and small form factor 100 GbE transceivers, deliver more than 2X reduction in power and size, and 10X increase in port density for 100 GbE transceivers versus existing solutions based upon silicon-germanium technology, and accelerate the mass transition from 10 GbE to 100 GbE in data center and communications infrastructures, the expectation that cost-effective, energy-efficient 100 GbE links will become important tools for data center and service provider networks, the expectation that the evolution of the 100 GbE transceivers will be similar to that of the earlier Gigabit Ethernet and 10 GbE technologies, which evolved from power-hungry, large form factor, and niche transceivers to low power, small form factor, and high volume products, our efforts to drive the development of next-generation low power and high port density 100 GbE standards and the anticipated sampling of our first 100 GbE CMOS SerDes products in the second half of 2011. These statements are based on current expectations and assumptions that are subject to risks and uncertainties. Actual results could differ materially from those anticipated as a result of various factors, including: product defects, ourability to develop new or enhance products in a timely manner; market development of and demand for our products, reliance on third parties to manufacture, assemble and test products; our ability to compete and other risks inherent in fabless semiconductor businesses. For a discussion of these and other related risks, please refer to our recent SEC filings, including our annual report on Form 10-K for the year ended December 31, 2010, which is available on the SEC’s website at www.sec.gov. Readers are cautioned not to place undue reliance on these forward-looking statements, which speak only as of the date thereof. Inphi Corporation undertakes no obligation to update forward-looking statements for any reason, except as required by law.

Inphi is a registered trademark of Inphi Corporation. All other trademarks used herein are the property of their respective owners.