100G Ethernet/OTU4 CDR for Module Applications
- Low power CMOS SerDes for Clock and Data Recovery (retimer) applications for 100G Ethernet and OTU4 next generation 100G modules
- Supports high density 100 Gbps optical modules and line cards with 25-28 Gbps electrical interfaces
- Power optimized for high density optical modules and line cards
- Quad 25 or 28 Gbps Retimer for use in next generation 100GBASE-LR4/ER4 optical modules
- No reference clock required
- Supports 100GBASE-LR4/ER4
- Supports OTU4 28 Gbps operation for OTL4.4
- Self adaptive receive equalization
- High resolution Rx eye scan - iSCAN
- Loss of Protocol Lock detection
- Test pattern generation and checking
- Monitor clock output
The 100GBASE-LR4/ER4 long reach fiber optic PMD uses four 25 Gbps wavelengths. To interface with system ASICs with 10G I/Os, a gearbox function is required. Next generation 100G modules are designed to allow the gearbox function to be placed on the line card, rather than inside the module. This allows the creation of denser, lower power modules by reducing the number of module pins and removing the gearbox function from the module and replacing it with two iPHY IN012525s.
Next generation 100G modules also support OTU OTL4.4 by running the interfaces 12% faster (11.2 and 28 Gbps). The iPHY IN012525 also supports this rate (two discrete rates are supported). In this document although interfaces may be referred to by their ethernet rates, support for OTL4.4 rates is implicit.